This invention relates to chemical mechanical polishing, and more particularly to a flexible membrane for use a carrier head for chemical mechanical polishing.
Integrated circuits are typically formed on substrates, particularly silicon wafers, by the sequential deposition of conductive, semiconductive or insulative layers. After each layer is deposited, it is etched to create circuitry features. As a series of layers are sequentially deposited and etched, the outer or uppermost surface of the substrate, i.e., the exposed surface of the substrate, becomes increasingly nonplanar. This nonplanar surface can present problems in the photolithographic steps of the integrated circuit fabrication process. Therefore, there is a need to periodically planarize the substrate surface. In addition, planarization is needed when polishing back a filler layer, e.g., when filling trenches in a dielectric layer with metal.
Chemical mechanical polishing (CMP) is one accepted method of planarization. This planarization method typically requires that the substrate be mounted on a carrier or polishing head. The exposed surface of the substrate is placed against a polishing pad, such as circular pad or linear belt, that moves relative to the substrate. The carrier head provides a controllable load on the substrate to push it against the polishing pad. Some carrier heads include a flexible membrane that provides a mounting surface for the substrate, and a retaining ring to hold the substrate beneath the mounting surface. Pressurization or evacuation of a chamber behind the flexible membrane controls the load on the substrate. A polishing liquid, such as a slurry with abrasive particles, is supplied to the surface of the polishing pad.
A reoccurring problem in CMP is non-uniform polishing, i.e., variation in the polishing rate across the substrate surface. For example, polishing may thoroughly remove conductive material in some areas while leaving conductive material residue in other areas.